
- #Doxygen verilog drivers#
- #Doxygen verilog Patch#
- #Doxygen verilog software#
Low-pass filter disable/enable by CIA-A port A bit 1 not implemented.This way 3 pixels 12-bits each can be stored in one word. Currently aoOCS requires an 36-bit word SSRAM to store the video buffer.No changes to the bitplain data done after the beginning of a line are visible.
All bitplain data is fetched at once in a burst memory read at the begining of each line. No video external synchronize, lace mode, lightpen, genlock audio enable, color composite (BPLCON0). The contents of the SD card is generated by the aoOCS_tool described at Operation. Runs on the Minimig PCB and also on Terasic DE1,2 boards. Minimig ( ) - FPGA-based re-implementation of the original Amiga 500 hardware. Other Open-Source Amiga implementations include: Constraints on CLK_I signal: described in Clocks. Data port maximum operand size: 32-bits,. General description: 32-bit WISHBONE interface,. Version: WISHBONE specification Revision B.3,. The specification is automatically extracted from the Doxygen HTML output. #Doxygen verilog Patch#
Documentation generated by Doxygen (with doxverilog patch ( ).Tested only on a Terasic DE2-70 board (.
#Doxygen verilog software#
The blitter functionality was tested against the E-UAE Amiga software emulator. The system uses about 26.400 LE on Altera Cyclone II and about 267.000 bits of on-chip RAM. A VGA frame grabber is implemented that sends captured frames by 100 Mbit Ethernet in IP/UDP packets. More information about clocks is available at Clocks. A single altpll is used to generate all three clocks from one 50 MHz external clock. There are two more clocks: 12 MHz, 25 MHz generated to interface with external hardware (Audio codec, Ethernet controller). The system uses generally a single clock: 30 MHz. A rather simple method is used to extend the 256 PAL horizontal lines to 480 VGA lines: all lines are doubled except for every 8th one. The video output is VGA compatible: 640x480 at 70 Hz. It is enabled and disabled by the Home key and controled by the keyboard arrow keys and the right CTRL key. The On-Screen-Display is independent of the running Amiga software. insert a floppy - select one from a list. enable or disable floppy write protection. enable or disable Joystick (keyboard arrow keys). select ROM file to load (only Amiga Kickstart v1.2 was tested).
The following options are available on the On-Screen-Display:. No additional controller/processor with firmware required to handle the SoC. The On-Screen-Display is implemented in HDL as a finite state machine. All the rest memory can be used as Chip RAM. A video buffer with about 250KB is located SSRAM. aoOCS uses only one external memory: a SSRAM with 36-bit words and pipelined access. #Doxygen verilog drivers#
HDL drivers for SSRAM, PS/2 keyboard, PS/2 mouse, audio codec, VGA DAC.10/100 Mbit Ethernet controller written in HDL to send the current VGA frames (frame grabber).SD card controller written in HDL with DMA.The aoOCS contains the following additional components:.All of the above components are WISHBONE revision B.3 compatible.ao68000 OpenCores IP core is used as the aoOCS processor.Only the internal floppy drive is implemented floppy: read and write ADF files directly from a SD card.user input: PS/2 mouse, PS/2 keyboard and joystick (keyboard arrow keys).video: bitplains, sprites, collision detection.The aoOCS SoC contains the following Amiga/OCS components:.Further development of aoOCS will continue on github. The OpenCores aoOCS SoC is a Wishbone compatible implementation of most of the Amiga Original Chip Set (OCS) and computer functionality.ĪoOCS is not related in any way with Minimig - it is a new and independent Amiga OCS implementation.